PIC18F14K50-I/SO【PDF 133/285 页】IC PIC MCU FLASH 8KX16 20-SOIC

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Sheet目录3871

129页 130页 131页 132页 [133页]134页 135页 136页 137页

2006 Microchip Technology Inc.

Preliminary

DS70178C-page 217

dsPIC30F1010/202X

18.11 In-Circuit Debugger

When MPLAB ICD 2 is selected as a debugger, the

in-circuit debugging functionality is enabled. This func-

tion allows simple debugging functions when used with

MPLAB IDE. When the device has this feature enabled,

some of the resources are not available for general

use. These resources include the first 80 bytes of data

RAM and two I/O pins.

One of four pairs of Debug I/O pins may be selected by

the user using configuration options in MPLAB IDE.

These pin pairs are named EMUD/EMUC, EMUD1/

EMUC1 and EMUD2/EMUC2.

In each case, the selected EMUD pin is the Emulation/

Debug Data line, and the EMUC pin is the Emulation/

Debug Clock line. These pins will interface to the

MPLAB ICD 2 module available from Microchip. The

selected pair of Debug I/O pins is used by

MPLAB ICD 2 to send commands and receive

responses, as well as to send and receive data. To use

the in-circuit debugging function of the device, the

design must implement ICSP connections to MCLR,

VDD, VSS, PGC, PGD and the selected

EMUDx/EMUCx pin pair.

This gives rise to two possibilities:

If EMUD/EMUC is selected as the debug I/O pin

pair, then only a 5-pin interface is required, as

the EMUD and EMUC pin functions are multi-

plexed with the PGD and PGC pin functions in

all dsPIC30F devices.

EMUD1/EMUC1

EMUD2/EMUC2

selected as the debug I/O pin pair, then a 7-pin

interface is required, as the EMUDx/EMUCx pin

functions (x = 1 or 2) are not multiplexed with the

PGD and PGC pin functions.

TABLE 18-7:

FWDT AND FPOR BIT DESCRIPTIONS FOR dsPIC30F1010/202X

Bit Field

Register

Description

FWDTEN

FWDT

Watchdog Timer Enable bit

= Watchdog Timer always enabled. (LPRC oscillator cannot be dis-

abled. Clearing the SWDTEN bit in the RCON register will have no

effect.)

= Watchdog Timer enabled/disabled by user software (LPRC can be

disabled by clearing the SWDTEN bit in the RCON register)

WWDTEN

FWDT

Watchdog Timer Window Enable bit

= Watchdog Timer in Non-Window mode

= Watchdog Timer in Window mode

WDTPRE

FWDT

Watchdog Timer Prescaler bit

= 1:128

= 1:32

WDTPOST<3:0>

FWDT

Watchdog Timer Postscaler bits

1111

= 1:32, 768

1110

= 1:16, 384

0001

= 1:2

0000

= 1:1

FPWRT<2:0>

FPOR

Power-on Reset Timer Value Select bits

111

= PWRT = 128 ms

110

= PWRT = 64 ms

101

= PWRT = 32 ms

100

= PWRT = 16 ms

011

= PWRT = 8 ms

010

= PWRT = 4 ms

001

= PWRT = 2 ms

000

= PWRT = Disabled

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